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74V1G07 Datasheet Single Buffer Open Drain

Manufacturer: STMicroelectronics

Overview: ® 74V1G07 SINGLE BUFFER (OPEN DRAIN) PRELIMINARY DATA s s s s s s HIGH SPEED: tPD = 6.1 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 1 µA (MAX.) at TA = 25 oC HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUT OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 5.5V IMPROVED LATCH-UP IMMUNITY S (SOT23-5L) C (SC-70) ORDER CODE: 74V1G07S 74V1G07C Power down protection is provided on input and 0 to 7V can be accepted on input with no regard to the supply voltage. This device can be used to interface 5V to 3V.

General Description

The 74V1G07 is an advanced high-speed CMOS SINGLE BUFFER (OPEN DRAIN) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.

The internal circuit is posed of 2 stages including buffer output, which provide high noise immunity and stable output.

PIN CONNECTION AND IEC LOGIC SYMBOLS October 1999 1/7 74V1G07 INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1 2 4 3 5 SYMBOL N.C.

74V1G07 Distributor