DESCRIPTION
bs u This D-Type flip-flop is controlled by a clock input d (CK). On the positive transition of the clock, the Q ro output will be set to the logic state that was setup P at the D input. SOT23-5L SOT323-5L ORDER CODES PACKAGE SOT23-5L SOT323-5L T&R 74V1G79STR 74V1G79CTR Following the hold time interval, data at the D input can be changed without affecting the level at the output. Power down protection is provided on inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V systems. It’s available in the commercial and extended temperature range. All inputs and output are equipped with protection circuits against static discharge, giving them ESD immunity and transient excess voltage. Obsolete PIN CONNECTION AND IEC LOGIC SYMBOLS April 2004 1/10 74V1G79 INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
PIN N° 1 2 4 3 5 SYMBOL D CK Q GND VCC NAME AND FUNCTION Data Input Clock Input (Positive Edge) Flip-Flop Output...
STMicroelectronics
