Datasheet4U Logo Datasheet4U.com

74V1G79 - D-TYPE FLIP-FLOP

Description

O FLIP-FLOP fabricated with sub-micron silicon - gate and double-layer metal wiring C2MOS t(s) technology.

c applications.

📥 Download Datasheet

Datasheet preview – 74V1G79

Datasheet Details

Part number 74V1G79
Manufacturer STMicroelectronics
File Size 120.52 KB
Description D-TYPE FLIP-FLOP
Datasheet download datasheet 74V1G79 Datasheet
Additional preview pages of the 74V1G79 datasheet.

📁 Similar Datasheet

  • 74V2G03 - DUAL 2-INPUT OPEN DRAIN NAND GATE (ST Microelectronics)
  • 74V2T00 - DUAL 2-INPUT NAND GATE (ST Microelectronics)
  • 74V2T03 - DUAL 2-INPUT OPEN DRAIN NAND GATE (ST Microelectronics)
  • 74V2T04 - TRIPLE INVERTER (ST Microelectronics)
  • 74V2T07 - TRIPLE BUFFER (ST Microelectronics)
  • 74V2T08 - DUAL 2-INPUT AND GATE (ST Microelectronics)
  • 74V2T241 - DUAL BUS BUFFER (ST Microelectronics)
  • 74VCX00 - Low Voltage Quad 2-Input NAND Gate (Fairchild Semiconductor)
  • 74VCX08 - Low Voltage Quad 2-Input AND Gate (Fairchild Semiconductor)
  • 74VCX132 - Low Voltage Quad 2-Input NAND Gate (Fairchild Semiconductor)
Other Datasheets by STMicroelectronics

Full PDF Text Transcription

Click to expand full text
74V1G79 SINGLE POSITIVE EDGE TRIGGERED D-TYPE FLIP-FLOP s HIGH SPEED: fMAX = 180MHz (TYP.) at VCC = 5V s LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C s HIGH NOISE IMMUNITY: ) VNIH = VNIL = 28% VCC (MIN.) t(s s POWER DOWN PROTECTION ON INPUTS s SYMMETRICAL OUTPUT IMPEDANCE: uc |IOH| = IOL = 8mA (MIN) at VCC = 4.5V d s BALANCED PROPAGATION DELAYS: ro tPLH ≅ tPHL P s OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 5.5V te s IMPROVED LATCH-UP IMMUNITY ole DESCRIPTION bs The 74V1G79 is an advanced high-speed CMOS SINGLE POSITIVE EDGE TRIGGERED D-TYPE O FLIP-FLOP fabricated with sub-micron silicon - gate and double-layer metal wiring C2MOS t(s) technology. it is designed to operate from 2V to 5.5V, making this device ideal for portable c applications.
Published: |