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74VHC138 Datasheet 3 To 8 Line Decoder

Manufacturer: STMicroelectronics

Overview: 74VHC138 3 TO 8 LINE DECODER (INVERTING) s HIGH SPEED: tPD = 5.7ns (TYP.) at VCC = 5V s LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C s HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) )s POWER DOWN PROTECTION ON INPUTS t(ss SYMMETRICAL OUTPUT IMPEDANCE: c|IOH| = IOL = 8 mA (MIN) us BALANCED PROPAGATION DELAYS: dtPLH ≅ tPHL ros OPERATING VOLTAGE RANGE: PVCC(OPR) = 2V to 5.

General Description

The 74VHC138 is an advanced high-speed - OCMOS 3 TO 8 LINE DECODER (INVERTING) )fabricated with sub-micron silicon gate and t(sdouble-layer metal wiring C2MOS technology.

If the device is enabled, 3 binary select (A, B, and cC) determine which one of the outputs will go low.

uIf enable input G1 is held low or either G2A or G2B rodis held high, the decoding function is inhibited and all the 8 outputs go to high.

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