DESCRIPTION
While the LE input is held at a high level, the Q PIN CONNECTION AND IEC LOGIC SYMBOLS June 1999 1/10 74VHC573 INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
PIN No 1 2, 3, 4, 5, 6, 7, 8, 9 12, 13, 14, 15, 16, 17, 18, 19 11 10 20 SYMBOL OE D0 to D7 NAME AND FUNCT ION 3 State Output Enable Input (Active LOW) Data Inputs Q0 to Q7 3 State Latch Outputs LE GND VCC Latch Enable Input Ground (0V) Positive Supply Voltage TRUTH TABLE INPUTS OE H L L L LE X L H H D X X L H OUT PUTS Q Z NO CHANGE * L H X:Don’t care Z: High impedance * Q outputs are latched atthe time when the LEinput is taken low logic level. LOGIC DIAGRAM 2/10 74VHC573 ABSOLUTE MAXIMUM RATINGS
Symbol VCC VI VO IIK IOK IO Tstg TL Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Current Storage Temperature Lead Temperature (10 sec) Parameter Value -0.5 to +7.0 -0.5 to +7.0 -0.5 to VCC + 0.5 - 20 ± 20 ± 25 ± 75 -65 to +150 300 Unit V V V mA mA mA mA o o ICC or IGND DC VCC or Ground Current C C ABSOLUTE MAXIMUM RATINGS
are those values beyond which damage to the device may occur.
STMicroelectronics
