Datasheet Details
| Part number | 74VHCT138A |
|---|---|
| Manufacturer | STMicroelectronics |
| File Size | 64.53 KB |
| Description | 3 TO 8 LINE DECODER INVERTING |
| Datasheet | 74VHCT138A_STMicroelectronics.pdf |
|
|
Overview: ® 74VHCT138A 3 TO 8 LINE DECODER (INVERTING) PRELIMINARY DATA s s s s s s s s s s HIGH SPEED: tPD = 7.6 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA = 25 oC PATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN), VIL = 0.8V (MAX) POWER DOWN PROTECTION ON INPUTS & OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 4.5V to 5.5V PIN AND FUNCTION PATIBLE WITH 74 SERIES 138 IMPROVED LATCH-UP IMMUNITY LOW NOISE: VOLP = 0.8V (Max.
| Part number | 74VHCT138A |
|---|---|
| Manufacturer | STMicroelectronics |
| File Size | 64.53 KB |
| Description | 3 TO 8 LINE DECODER INVERTING |
| Datasheet | 74VHCT138A_STMicroelectronics.pdf |
|
|
|
The 74VHCT138A is an advanced high-speed CMOS 3 TO 8 LINE DECODER (INVERTING) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.
If the device is enabled, 3 binary select inputs (A, B and C) determine which one of the outputs will go low.
If enable input G1 is held low or either G2A or G2B is held high, the decoding function is inhibited and all the 8 outputs go to high.
| Brand Logo | Part Number | Description | Manufacturer |
|---|---|---|---|
 |
74VHCT138A | 3-to-8 Decoder/Demultiplexer | Fairchild Semiconductor |
| Part Number | Description |
|---|---|
| 74VHCT132A | QUAD 2-INPUT SCHMITT NAND GATE |
| 74VHCT139A | DUAL 2 TO 4 DECODER/DEMULTIPLEXER |
| 74VHCT125A | QUAD BUS BUFFERS |
| 74VHCT126A | QUAD BUS BUFFERS |
| 74VHCT14A | HEX SCHMITT INVERTER |
| 74VHCT157A | QUAD 2 CHANNEL MULTIPLEXER |
| 74VHCT174A | HEX D-TYPE FLIP-FLOP |
| 74VHCT00A | QUAD 2-INPUT NAND GATE |
| 74VHCT02A | QUAD 2-INPUT NOR GATE |
| 74VHCT03A | QUAD 2-INPUT OPEN DRAIN NAND GATE |