Datasheet Details
| Part number | 74VHCT174A |
|---|---|
| Manufacturer | STMicroelectronics |
| File Size | 70.62 KB |
| Description | HEX D-TYPE FLIP-FLOP |
| Datasheet | 74VHCT174A_STMicroelectronics.pdf |
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Overview: ® 74VHCT174A HEX D-TYPE FLIP FLOP WITH CLEAR PRELIMINARY DATA s s s s s s s s s s HIGH SPEED: fMAX =150 MHz (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA = 25 oC PATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN), VIL = 0.8V (MAX) POWER DOWN PROTECTION ON INPUTS & OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 4.5V to 5.5V PIN AND FUNCTION PATIBLE WITH 74 SERIES 174 IMPROVED LATCH-UP IMMUNITY LOW NOISE: VOLP = 0.8V (Max.
| Part number | 74VHCT174A |
|---|---|
| Manufacturer | STMicroelectronics |
| File Size | 70.62 KB |
| Description | HEX D-TYPE FLIP-FLOP |
| Datasheet | 74VHCT174A_STMicroelectronics.pdf |
|
|
|
The 74VHCT174A is an advanced high-speed CMOS HEX D-TYPE FLIP FLOP WITH CLEAR fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.
Information signals applied to D inputs are transfered to the Q outputs on the positive going edge of the clock pulse.
When the CLEAR input is held low, the Q outputs are held low independently of the other inputs.
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| 74VHCT138A | 3 TO 8 LINE DECODER INVERTING |
| 74VHCT139A | DUAL 2 TO 4 DECODER/DEMULTIPLEXER |
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| 74VHCT00A | QUAD 2-INPUT NAND GATE |
| 74VHCT02A | QUAD 2-INPUT NOR GATE |
| 74VHCT03A | QUAD 2-INPUT OPEN DRAIN NAND GATE |