STMicroelectronics 74VHCT573A
The 74VHCT573A is an advanced high-speed CMOS OCTAL D-TYPE LATCH with 3 STATE OUTPUT NON INVERTING fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. This 8 bit D-Type latch is controlled by a latch enable input (LE) and an output enable input (OE). When the LE is taken low, the Q outputs will be latched precisely at the logic level of D input data.- Min Voltage : 4.5V
- Max Voltage : 5.5V
- Channels : 8
- Max Operating Temp : 85°C
- Min Operating Temp : -40°C
Source:
Octopart
DESCRIPTION
PIN CONNECTION AND IEC LOGIC SYMBOLS While the LE input is held at a high level, the Q outputs will follow the data inputs precisely. While the (OE) input is low, the 8 outputs will be in a normal logic state (high or low logic level) and while high level the outputs will be in a high impedance state. Power down protection is provided on all inputs and outputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. February 2000 1/10 74VHCT573A INPUT EQUIVALENT CIRCUIT PINDESCRIPTION
PIN No 1 2, 3, 4, 5, 6, 7, 8, 9 12, 13, 14, 15, 16, 17, 18, 19 11 10 20 SYMBOL OE D0 to D7 NAME AND FUNCT ION 3 State Output Enable Input (Active LOW) Data Inputs Q0 to Q7 3 State Latch Outputs LE GND VCC Latch Enable Input Ground (0V) Positive Supply Voltage TRUTH TABLE INPUTS OE H L...