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HCF4035B - 4-STAGE PARALLEL IN/PARALLEL OUT SHIFT REGISTER

General Description

Whith JK inputs connected together, the first stage becomes a D flip-flop.

An asynchronous common RESET is also provided.

Key Features

  • critical components in life support devices or systems without express written approval of SGS-.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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HCC/HCF4035B 4-STAGE PARALLEL IN/PARALLEL OUT SHIFT REGISTER . . . . . . . . . . . . . 4-STAGE CLOCKED SHIFT OPERATION SYNCHRONOUS PARALLEL ENTRY ON ALL 4 STAGES JK INPUTS ON FIRST STAGE ASYNCHRONOUS TRUE/COMPLEMENT CONTROL ON ALL OUTPUTS STATIC FLIP-FLOP OPERATION ; MASTERSLAVE CONFIGURATION BUFFERED INPUTS AND OUTPUTS HIGH SPEED 12MHz (typ.) AT VDD = 10V QUIESCENT CURRENT SPECIFIED TO 20V FOR HCC DEVICE STANDARDIZED SYMMETRICAL OUTPUT CHARACTERISTICS 5V, 10V, AND 15V PARAMETRIC RATINGS INPUT CURR 100nA AT 18V AND 25°C FOR HCC DEVICE 100% TESTED FOR QUIESCENT CURRENT MEETS ALL REQUIREMENTS OF JEDEC TENTATIVE STANDARD N°. 13A, ”STANDARD SPECIFICATIONS FOR DESCRIPTION OF ”B” SERIES CMOS DEVICES” Whith JK inputs connected together, the first stage becomes a D flip-flop.