DESCRIPTION
LET9002 boasts the excellent gain, linearity and reliability of ST’s latest LDMOS technology mounted in the innovative leadless SMD plastic package, PowerFLAT™. PIN CONNECTION TOP VIEW ABSOLUTE MAXIMUM RATINGS
(TCASE = 25 °C) Symbol V(BR)DSS VGS ID PDISS Tj TSTG Drain-Source Voltage Gate-Source Voltage Drain Current Power Dissipation (@ Tc = 70°C) Max. Operating Junction Temperature Storage Temperature Parameter Value 65 -0.5 to +15 0.25 4 150 -65 to +150 Unit V V A W °C °C THERMAL DATA Rth(j-c) Junction -Case Thermal Resistance 20 °C/W April, 15 2003 1/4 LET9002 ELECTRICAL SPECIFICATION (TCASE = 25 °C) STATIC Symbol V(BR)DSS IDSS IGSS VGS(Q) VDS(ON) gFS CISS COSS CRSS VGS = 0 V VGS = 0 V VGS = 5 V VDS = 26 V VGS = 10 V VDS = 10 V VGS = 0 V VGS = 0 V VGS = 0 V Test Conditions IDS = 1 mA VDS = 26 V VDS = 0 V ID = TBD ID = 125 mA ID = 200 mA VDS = 26 V VDS = 26 V VDS = 26 V f = 1 MHz f = 1 MHz f = 1 MHz -TBD TBD TBD 2.0 Min. 65 1 1 5.0 0.9 Typ. Max. Unit V µA µA V V mho pF pF pF DYNAMIC (f = 960 MHz) Symbol Pout(1) ηD(1) Load mismatch VDD = 26 V VDD = 26 V IDQ = TBD IDQ = TBD POUT = 2 W POUT = 2 W Test Conditions Min.