M48T129V Description
10 2.3 Data retention mode . 11 t(s) 3 Clock operations . 12 c 3.1 TIMEKEEPER® registers.
M48T129V Key Features
- Integrated, ultra low power SRAM, real-time
- BCD coded century, year, month, day, date, t(s hours, minutes, and seconds c
- Battery low warning flag du
- Automatic power-fail chip deselect and WRITE ro protection P
- Two WRITE protect voltages: te (VPFD = power-fail deselect voltage) le
- M48T129Y: VCC = 4.5 to 5.5 V
- M48T129V: VCC = 3.0 to 3.6 V; b 2.7 V ≤ VPFD ≤ 3.0 V O
- Conventional SRAM operation; unlimited
- WRITE cycles t(s)
- Software controlled clock calibration for high
M48T129V Applications
- 10 years of data retention and clock operation d in the absence of power ro