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M48Z35 - 256-Kbit SRAM

General Description

The M48Z35/Y ZEROPOWER® RAM is a 32 K x 8, non-volatile static RAM that integrates powerfail deselect circuitry and battery control logic on a single die.

The monolithic chip is available in two special packages to provide a highly integrated battery-backed memory solution.

Key Features

  • Integrated, ultra low power SRAM, power-fail control circuit, and battery.
  • READ cycle time equals WRITE cycle time.
  • Automatic power-fail chip deselect and WRITE protection.
  • WRITE protect voltages: (VPFD = power-fail deselect voltage).
  • M48Z35: VCC = 4.75 to 5.5 V; 4.5 V ≤ VPFD ≤ 4.75 V.
  • M48Z35Y: 4.5 to 5.5 V; 4.2 V ≤ VPFD ≤ 4.5 V.
  • Self-contained battery in the CAPHAT™ DIP package.
  • Packaging includes a 28-lead SOIC and SNAPHA.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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M48Z35, M48Z35Y 256 Kbit (32 Kbit x 8) ZEROPOWER® SRAM Datasheet - production data 28 1 PDIP 28.7 Battery CAPHAT™ SNAPHAT® battery 28 1 SOH28 Features • Integrated, ultra low power SRAM, power-fail control circuit, and battery • READ cycle time equals WRITE cycle time • Automatic power-fail chip deselect and WRITE protection • WRITE protect voltages: (VPFD = power-fail deselect voltage) • M48Z35: VCC = 4.75 to 5.5 V; 4.5 V ≤ VPFD ≤ 4.75 V • M48Z35Y: 4.5 to 5.5 V; 4.2 V ≤ VPFD ≤ 4.