DESCRIPTION
Each of these data (1C0-1C3, 2C0-2C3) is selected by the two address inputs A and B. Separate strobe inputs (1G, 2G) are provided for each of the two four line sections. Taking the strobe input (1G, 2G) high inhibits the outputs. The output of HC352 is fixed at logic low level and the output of HC353 has a high impedance, unconditionally. All inputs are equipped with protection circuits against static discharge and transient excess voltage. October 1993 NC = No Internal Connection 1/11 M54/M74HC352/353 TRUTH TABLE SELECT INPUTS B X L L L L H H H H X: Don’t Care Z: High Impedance DATA INPUTS C0 X L H X X X X X X C1 X X X L H X X X X C2 X X X X X L H X X C3 X X X X X X X L H STROBE G H L L L L L L L L OUTPUT Y HC352 H H L H L H L H L HC353 Z H L H L H L H L A X L L H H L L H H LOGIC DIAGRAM HC352 HC353 2/11 M54/M74HC352/353 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
PIN No 1, 15 6, 5, 4, 3 7 9 10, 11, 12, 13 14, 2 8 16 SYMBOL 1G, 2G 1C0 to 1C3 1Y 2Y 2C0 to 2C3 A, B G...