DESCRIPTION
s - State changes of the counter are synchronous t(s) with the LOW-to-HIGH transition of the Clock Pulse Input. c An asynchronous parallel load input overrides u counting and loads the data present on the DATA d inputs into the flip-flops, which makes it possible to ro use the circuits as programmable counters. A P count enable input serves as the carry/borrow DIP SOP TSSOP ORDER CODES PACKAGE TUBE DIP SOP TSSOP M74HC191B1R M74HC191M1R T&R M74HC191RM13TR M74HC191TTR input in multi-stage counters. Control input, Down/ Up, determines whether a circuit counts up or down. A MAX/MIN output and a Ripple Clock output provide overflow/underflow indication and make possible a variety of methods for generating carry/borrow signals in multi-stage counter applications. All inputs are equipped with protection circuits against static discharge and transient excess voltage. Obsolete PIN CONNECTION AND IEC LOGIC SYMBOLS August 2001 1/14 M74HC191 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESC...
STMicroelectronics
