DESCRIPTION
This devices comes in a 16-pin package and consist of an 8-bit storage latch feeding a parallel-in, serialout 8-bit shift register. Both the storage register and shift register have positive-edge triggered clocks. The shift register also has direct load (from storage) and clear inputs. All inputs are equipped with protection circuits against static discharge and transient voltage excess. October 1992 NC = No Internal Connection 1/13 M54/M74HC597 INPUT AND OUTPUT EQUIVALENT CIRCUIT TRUTH TABLE INPUTS SI X X L H X X X X: DON’T CARE SCK X X SCLR L H H H H SLOAD H L H H H X X RCK X X X X X OUTPUT S.R. IS CLEARED TO ”L” INPTU REGISTER DATA IS STORED INTO S.R. FIRST STAGE OF S.R. BECOMES ”L” OTHER STAGES STORE THE DATA OF PREVIOUS STAGE, RESPECTIVELY FIRST STAGE OF S.R. BECOMES ”H” OTHER STAGES STORE THE DATA OF PREVIOUS STAGE, RESPECTIVELY STATE OF S.R IS NOT CHANGED INPUT DATA ON A ~ H LINE IS STORED INTO INPUT REGISTER STORAGE REGISTER STATE IS NOT CHANGED X X X X LOGIC DIAGRA...
STMicroelectronics
