STMicroelectronics M74HC75
The M54/74HC75 is a high speed CMOS 4-BIT DTYPE LATCH fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption.DESCRIPTION
It contains two groups of 2-bit latches controlled by an enable input (G1●2 or G3●4). These two latch groups can be used in different circuits. Each latch has Q and Q outputs (1Q - 4Q and 1Q - 4Q). The data applied to the data input is transfered to the Q and Q outputs when the enable input is taken high and the outputs will follow the data input as long as the enable input is kept high. When the enable input is taken low, the information data applied to the data input is retained at the outputs. All inputs are equipped with protection circuits against static discharge and transient excess voltage. INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN CONNECTIONS (top view) NC = No Internal Connection December 1992 1/9 M54/M74HC75 TRUTH TABLE INPUTS D L H X G H H L OUTPUTS Q L H Qn Q H L Qn LATCH FUNCTION IEC LOGIC SYMBOL PINDESCRIPTION
PIN No 1, 14, 11, 8 2, 3, 6, 7 4 13 16, 15, 10, 9 12 5 SYMBOL 1Q to 4Q 1D to 4D G3● 4 G1
● 2 1Q to 4Q GND VCC NAME AND FUNCTION Complementary Latch Out...