M95256-DR Description
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
M95256-DR Key Features
- patible with the Serial Peripheral Interface (SPI) bus
- Memory array
- 256 Kbits (32 Kbytes) of EEPROM
- Page size: 64 bytes
- Additional Write lockable Page (Identification page)
- Write (self-timed cycle)
- Byte Write within 5 ms
- Page Write within 5 ms
- Write Protect: quarter, half or whole memory array
- High-speed clock frequency (20 MHz)