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M95256-DRE
256-Kbit serial SPI bus EEPROM - 105 °C Operation
SO8 (MN) 150 mil width
TSSOP8 (DW) 169 mil width
WFDFPN8 (MF) 2 x 3 mm
Datasheet - production data
Features
• Compatible with the Serial Peripheral Interface (SPI) bus
• Memory array – 256 Kbit (32 Kbytes) of EEPROM – Page size: 64 bytes – Write protection by block: 1/4, 1/2 or whole memory – Additional Write lockable Page (Identification page)
• Extended temperature and voltage range – Up to 105 °C (VCC from 1.8 V to 5.5 V)
• High speed clock frequency – 20 MHz for VCC ≥ 4.5 V – 10 MHz for VCC ≥ 2.5 V – 5 MHz for VCC ≥ 1.8 V
• Schmitt trigger inputs for noise filtering
• Short Write cycle time – Byte Write within 4 ms – Page Write within 4 ms
• Write cycle endurance – 4 million Write cycles at 25 °C – 1.