STMicroelectronics PSD813F2V
The can be used for the following functions: t(s– MCU I/Os c– PLD I/Os du– Latched MCU address output ro– Special function I/Os.FEATURES
SUMMARY● FLASH IN-SYSTEM PROGRAMMABLE (ISP) PERIPHERAL FOR 8-BIT MCUS Figure 1. Packages
● DUAL BANK FLASH MEMORIES – UP TO 2 Mbit OF PRIMARY FLASH MEMORY (8 Uniform Sectors, 32K x8) – UP TO 256 Kbit SECONDARY FLASH MEMORY (4 Uniform Sectors) PQFP52 (M) – Concurrent operation: READ from one )memory while erasing and writing the t(sother
● UP TO 256 Kbit of SRAM uc● 27 RECONFIGURABLE I/O PORTS d● ENHANCED JTAG SERIAL PORT ro● PLD WITH MACROCELLS P– Over 3000 Gates of PLD: CPLD and teDPLD le– CPLD with 16 Output Macrocells (OMCs) and 24 Input Macrocells (IMCs) so– DPLD - user defined internal chip select bdecoding O● 27 INDIVIDUALLY CONFIGURABLE I/O -PORT PINS ) P– 16 of the I/O ports may be configured as open-drain outputs. te● IN-SYSTEM PROGRAMMING (ISP) WITH leJTAG o– Built-in JTAG compliant serial port allows s full-chip In-System Programmability Ob– Efficient manufacturing allow easy PLCC52 (J) TQFP64 (U)
● HIGH ENDURANCE: – 100,000 Erase/WRITE Cycles of Flash Memory – 1,0...