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PSD8XXFX
Flash in-system programmable (ISP) peripherals for 8-bit MCUs, 5 V
Features
■ Flash in-system programmable (ISP) peripheral for 8-bit MCUs
■ Dual bank Flash memories
)– Up to 2 Mbit of primary Flash memory (8 t(suniform sectors, 32K x8) c– Up to 256 Kbit secondary Flash memory (4 uuniform sectors) rod– Concurrent operation: read from one
memory while erasing and writing the other
P■ Up to 256 Kbit SRAM te■ 27 reconfigurable I/Oports ole■ Enhanced JTAG serial port s■ PLD with macrocells Ob– Over 3000 gates of PLD: CPLD and DPLD -– CPLD with 16 output macrocells (OMCs)
)and 24 input macrocells (IMCs) t(s– DPLD - user defined internal chip select cdecoding du■ 27 individually configurable I/O port pins roThey can be used for the following functions:
– MCU I/Os
P– PLD I/Os te– Latc
PSD813F2 Datasheet
