STMicroelectronics PSD813F1V
This is information on a product still in production but not recommended for new designs.FEATURES
SUMMARY● DUAL BANK FLASH MEMORIES Figure 1. Packages – 1 Mbit of Primary Flash Memory (8 Uniform Sectors) )– 256 Kbit Secondary EEPROM (4 Uniform t(sSectors) – Concurrent operation: read from one ucmemory while erasing and writing the dother ro )● 16 Kbit SRAM P t(s● PLD WITH MACROCELLS te c– Over 3,000 Gates Of PLD: DPLD and le uCPLD d– DPLD - User-defined Internal chip-select so rodecoding b P– CPLD with 16 Output Macrocells (OMCs) - O teand 24 Input Macrocells (IMCs)
● 27 RECONFIGURABLE I/Os ) le– 27 individually configurable I/O port pins t(s sothat can be used for the following c bfunctions: u OMCU I/Os; d -PLD I/Os; ro )Latched MCU address output; and P t(sSpecial function I/Os. te cNote: 16 of the I/O ports may be le uconfigured as open-drain outputs. so rod● ENHANCED JTAG SERIAL PORT – Built-in JTAG-compliant serial port allows b Pfull-chip In-System Programmability (ISP) O te– Efficient manufacturing allows for easy leproduct testing and programming o● PAGE REGISTER s– Internal page register that can be used to b expand the microcontroller address space O by a factor of 256.