PSD813F1V
Key Features
- DUAL BANK FLASH MEMORIES Figure
- 1 Mbit of Primary Flash Memory (8 Uniform Sectors) )- 256 Kbit Secondary EEPROM (4 Uniform t(sSectors)
- Concurrent operation: read from one ucmemory while erasing and writing the dother ro )
- 16 Kbit SRAM P t(s
- PAGE REGISTER s- Internal page register that can be used to b expand the microcontroller address space O by a factor of
- PROGRAMMABLE POWER MANAGEMENT
- STANDBY CURRENT AS LOW AS 50µA
