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SMP100LC-140 Datasheet TRISILTM FOR HIGH DEBIT RATE TELECOM LINES PROTECTION

Manufacturer: STMicroelectronics

General Description

The SMP100LC-xxx series is a very low capacitance transient surge arrestor designed for the protection of high debit rate communication equipment.

Its low capacitance avoid any distorsion of the signal.

It can also SCHEMATIC DIAGRAM BENEFITS n n n No ageing and no noise Short circuit in failure mode, thus still ensuring protection Board space saving March 2000 - Ed: 3B 1/8 SMP100LC-xxx COMPLIES WITH THE FOLLOWING STANDARDS: ITU-T- K20 VDE0433 VDE0878 IEC-1000-4-5 FCC Part 68, lightning surge type A FCC Part 68, lightning surge type B BELLCORE TR-NWT-001089 First level BELLCORE TR-NWT-001089 Second level CNET I31-24 Peak Surge Voltage (V) 4000 4000 4000 level 4 level 4 1500 800 1000 2500 1000 5000 4000 Voltage Waveform (µs) 10/700 10/700 1.2/50 10/700 1.2/50 10/160 10/560 5/320 2/10 10/1000 2/10 0.5/700 Current Waveform (µs) 5/310 5/310 1/20 5/310 8/20 10/160 10/560 5/320 2/10 10/1000 2/10 0.8/310 Admissible Ipp (A) 100 100 100 100 100 200 100 25 500 100 500 100 Necessary Resistor (note 1) (Ω) - Note 1: minimum series resistance to insert on the module line to withstand the standard.

Overview

® TRISIL FOR HIGH DEBIT RATE TELECOM LINES PROTECTION PRELIMINARY DATASHEET TM.

Key Features

  • n n n n n Bidirectional crowbar protection Low capacitance : C = 30 PF TYP @ 50V Low leakage current : IR = 2 µA MAX Repetitive peak pulse current : IPP = 100 A (10/1000µS) Holding current: IH = 150 mA MAIN.