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SPC58NE84C3 - 32-bit Power Architecture microcontroller

This page provides the datasheet information for the SPC58NE84C3, a member of the SPC58EE80E7 32-bit Power Architecture microcontroller family.

Datasheet Summary

Description

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Features

  • AEC-Q100 qualified.
  • 32-bit Power Architecture VLE compliant CPU cores:.
  • Three main CPUs, dual issue, 32-bit CPU core complexes (e200z4), two of them having one checker core in lock-step.
  • Floating Point, End-to-End Error Correction.
  • 6576 KB (6288 KB code flash + 288 KB data flash) on-chip flash memory:.
  • supports read during program and erase operations, and multiple blocks allowing EEPROM emulation.
  • Supports read while read between t.

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Datasheet preview – SPC58NE84C3

Datasheet Details

Part number SPC58NE84C3
Manufacturer STMicroelectronics
File Size 0.98 MB
Description 32-bit Power Architecture microcontroller
Datasheet download datasheet SPC58NE84C3 Datasheet
Additional preview pages of the SPC58NE84C3 datasheet.

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Full PDF Text Transcription

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SPC58EEx, SPC58NEx 32-bit Power Architecture® microcontroller for automotive ASIL-D applications Datasheet - production data FPBGA292 (17 x 17 x 1.8 mm) eLQFP176 (24 x 24 x 1.4 mm) Known Good Die Features • AEC-Q100 qualified • 32-bit Power Architecture VLE compliant CPU cores: – Three main CPUs, dual issue, 32-bit CPU core complexes (e200z4), two of them having one checker core in lock-step – Floating Point, End-to-End Error Correction • 6576 KB (6288 KB code flash + 288 KB data flash) on-chip flash memory: – supports read during program and erase operations, and multiple blocks allowing EEPROM emulation – Supports read while read between the two code Flash partitions.
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