SPEAR-09-B042 Overview
SPEAr BASIC is a powerful digital engine belonging to SPEAr family, the innovative customizable system-on-chip. The device integrates an ARM 926 core with an extensive set of proven IPs and a large configurable logic block that allows very fast customization of unique and/or proprietary solutions. 1 This is preliminary information on a new product now in development or undergoing evaluation.
SPEAR-09-B042 Key Features
- ARM926EJ-S core @333 MHz
- 16 Kbyte instructions/data cache Reconfigurable logic array
- 300 Kgate (100% utilization rate)
- 102 I/O lines
- No clock domain limitation
- 64 Kbyte + 8 Kbyte configurable memory pool Multilayer AMBA 2.0 pliant bus with fMAX 166 MHz 32-Kbyte boot ROM 8 Kbyte m
- Shared with reconfigurable array Dynamic power saving features High performance DMA
- 8 channels Ethernet 10/100 MAC with MII interface. (IEEE-802.3) USB 2.0 device with integrated PHY
- LFBGA289 6 legacy GPIO bidirectional signals with interrupt capability ADC 10-bit, 1 Msps 8 inputs
- Hw supporting up to 13.5 bits at 8 KSPS by oversampling and accumulation JPEG codec accelerator (1 clock/pixel) C3 crypt