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ST22N144 Datasheet PDF

STMicroelectronics ST22N144

the ST22N144 based on ST Crypto Library. CRT: Chinese Reminder Theorem 2/7 ST22N144 DESCRIPTION The ST22N144 is a member of the SmartJ™ platform using a 32-bit Reduced Instruction Set Computer (RISC) core to execute both Native RISC instructions and JavaCard™ 2.x Technology instruction (byte codes) directly (See Figure 2.
Part No. ST22N144
Datasheet ST22N144 Download
Manufacturer
STMicroelectronics
Description Smartcard 32-Bit RISC MCU
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ST22N144 datasheet page 1 preview

FEATURES

I I I I I ADVANCED MEMORY PROTECTION – – – Memory Protection Unit for application firewalling and peripheral access control Domain switching securely controlled by protected Context Stack Native/Java, Code/Data memory attributes with 128-byte granularity Java stack with both 16 and 32-bit accesses User and Supervisor mode stacks Security Context Stack 32-BIT RISC CPU WITH 24-BIT LINEAR MEMORY ADDRESSING 368 KBYTES USER ROM 12 KBYTES USER RAM 144 KBYTES USER EEPROM DUAL INSTRUCTION SET, JAVACARD ™ AND NATIVE 4-STAGE PIPELINE 16 GENERAL PURPOSE 32-BIT REGISTERS, AND SPECIAL REGISTERS 4 MASKABLE INTERRUPT LEVELS SUPERVISOR AND USER MODES CPU SECURITY INSTRUCTIONS – – Dedicated instructions for DES and Triple DES implementation Dedicated instructions (Multiply and Accumulate) for efficient implementation of modular arithmetic and elliptic curves based cryptosystems CRC instruction (ISO 3309 16-bit Checksum) I 32-BIT RISC CPU I I I I I FOUR WORKING STACKS – – – Figure 1. Delivery F...
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