ST93CS56 Datasheet | STMicroelectronics

.. ST93CS56 ST93CS57 2K (128 x 16) SERIAL MICROWIRE EEPROM NOT FOR NEW DESIGN 1 MILLION ERASE/WRITE CYCLES, with 40 YEARS DATA RETENTION SELF-TIMED PROGRAMMING CYCLE with AUTO-ERASE READY/BUSY SIGNAL DURING PROGRAMMING SINGLE SUPPLY VOLTAGE - 3V to 5.5V for the ST93CS56 - 2.5V to 5.5V for the ST93CS57 USER DEFINED WRITE PROTECTED AREA PAGE WRITE MODE (4 WORDS) SEQUENTIAL READ OPERATION 5ms TYPICAL PROGRAMMING TIME ST93CS56 and ST93CS57 are replaced by the M93S56 8 1 PSDIP8 (B) 0.4mm Frame 8 1 SO8 (M) 150mil Width Figure 1. Logic Diagram DESCRIPTION The ST93CS56 and ST93CS57 are 2K bit Electrically Erasable Programmable Memory (EEPROM) fabricated with SGS-THOMSON’s High Endurance Single Polysilicon CMOS technology. The memory is accessed through a serial input D and output Q. The 2K bit memory is organized as 128 x 16 bit words.The memory is accessed by a set of instructions which include Read, Write, Page Write, Write All and instructions used to set the memory protection. A Read instruction loads the address of the first word to be read into an internal address pointer. Table 1. Signal Names S D Q C PRE W VCC VSS Chip Select Input Serial Data Input Serial Data Output Serial Clock Protect Enable Write Enable Supply Voltage Ground D C S PRE W ST93CS56 ST93CS57 Q AI00896B June 1997 This is information on a product still in production bu t not remended for new de signs. 1/16 .. ST93CS56, ST93CS57 Figure 2A. DIP Pin Connections Figure 2B. SO Pin Connections ST93CS56 ST93CS57 S C D Q 1 2 3 4 8 7 6 5 AI00897B ST93CS56 ST93CS57 VCC PRE W VSS S C D Q 1 2 3 4 8 7 6 5 AI00898C VCC PRE W VSS Table 2....