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STL20DN10F7 - Dual N-CHANNEL POWER MOSFET

General Description

This device utilizes the 7 generation of design rules of ST’s proprietary STripFET™ technology, with a new gate structure.

The resulting Power MOSFET exhibits the lowest RDS(on) in all packages.

Table 1.

Key Features

  • Order code STL20DN10F7 VDS RDS(on) max 100 V 0.067 Ω ID 5A.
  • N-channel enhancement mode.
  • Lower RDS(on) x area vs previous generation.
  • 100% avalanche rated.

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STL20DN10F7 Dual N-channel 100 V, 0.059 Ω typ., 5 A STripFET™ VII DeepGATE™ Power MOSFET in a PowerFLAT™ 5x6 double island package Datasheet - production data 1 4 1 8 5 4 PowerFLAT™ 5x6 double island Figure 1. Internal schematic diagram Features Order code STL20DN10F7 VDS RDS(on) max 100 V 0.067 Ω ID 5A • N-channel enhancement mode • Lower RDS(on) x area vs previous generation • 100% avalanche rated Applications • Switching applications Description th This device utilizes the 7 generation of design rules of ST’s proprietary STripFET™ technology, with a new gate structure. The resulting Power MOSFET exhibits the lowest RDS(on) in all packages. Order code STL20DN10F7 Table 1.