STL3N10F7 Description
th This device utilizes the 7 generation of design rules of ST’s proprietary STripFET™ technology, with a new gate structure. The resulting Power MOSFET exhibits the lowest RDS(on) in all packages. 6(D) 5(D) 4(S) Bottom view AM11269v1 Order code STL3N10F7 Table.
STL3N10F7 Key Features
- N-channel enhancement mode
- Low gate charge
- 100% avalanche rated