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STL3N10F7 - N-CHANNEL POWER MOSFET

General Description

This device utilizes the 7 generation of design rules of ST’s proprietary STripFET™ technology, with a new gate structure.

The resulting Power MOSFET exhibits the lowest RDS(on) in all packages.

Table 1.

Key Features

  • 1 2 3 1 2 3 6 5 4 PowerFLAT™ 2x2 Order code STL3N10F7 VDS 100 V RDS(on) max 0.07 Ω.
  • N-channel enhancement mode.
  • Low gate charge.
  • 100% avalanche rated ID 4A.

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STL3N10F7 N-channel 100 V, 0.062 Ω typ., 4 A STripFET™ VII DeepGATE™ Power MOSFET in a PowerFLAT™ 2x2 package Datasheet - production data Features 1 2 3 1 2 3 6 5 4 PowerFLAT™ 2x2 Order code STL3N10F7 VDS 100 V RDS(on) max 0.07 Ω • N-channel enhancement mode • Low gate charge • 100% avalanche rated ID 4A Applications • Switching applications Figure 1. Internal schematic diagram 1(D) 2(D) 3(G) DS Description th This device utilizes the 7 generation of design rules of ST’s proprietary STripFET™ technology, with a new gate structure. The resulting Power MOSFET exhibits the lowest RDS(on) in all packages. 6(D) 5(D) 4(S) Bottom view AM11269v1 Order code STL3N10F7 Table 1.