STM32H503KB Description
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STM32H503KB Key Features
- Arm® Cortex®-M33 CPU with FPU, frequency up to 250 MHz, MPU, 375 DMIPS (Dhrystone 2.1), and DSP instructions
- 8-Kbyte instruction cache allowing 0-wait-state execution from flash memory (frequency up to 250 MHz)
- 1.5 DMIPS/MHz (Drystone 2.1)
- 1023 CoreMark® (4.092 CoreMark®/MHz)
- 128 Kbytes of embedded flash memory with ECC, two banks of read-while-write
- 2-Kbyte OTP (one-time programmable)
- 32-Kbyte SRAM with ECC
- 2 Kbytes of backup SRAM (available in the
- 1.71 V to 3.6 V application supply and I/O
- POR, PDR, PVD, and BOR