SPN4526W Datasheet | SYNC POWER

DESCRIPTION The SPN4526 is the N-Channel logic enhancement mode power field effect transistors are produced using high cell density , DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application , notebook puter power management and other battery powered circuits where high-side switching . FEATURES ‹ 40V/10A,RDS(ON)= 25mΩ@VGS= 10V ‹ 40V/ 8A,RDS(ON)= 30mΩ@VGS= 4.5V ‹ 40V/ 6A,RDS(ON)= 36mΩ@VGS= 2.5V ‹ Super high density cell design for extremely low RDS (ON) ‹ Exceptional on-resistance and maximum DC current capability ‹ SOP - 8P package design APPLICATIONS z Power Management in Note book z Portable Equipment z Battery Powered System z DC/DC Converter z Load Switch z DSC z LCD Display inverter PIN CONFIGURATION(SOP - 8P) PART MARKING 2011/ 06/ 03 Ver.1 Page 1 N-Channel Enhancement Mode MOSFET PIN DESCRIPTION Pin 1 2 3 4 5 6 7 8 Symbol S S S G D D D D Description Source Source Source Gate Drain Drain Drain Drain ORDERING INFORMATION Part Number SPN4526WS8RGB Package SOP- 8P Part Marking SPN4526W ※ SPN4526WS8RGB 13” Tape Reel ; Pb - Free ; Halogen - Free ABSOULTE MAXIMUM RATINGS (TA=25℃ Unless otherwise noted) Parameter Drain-Source Voltage Gate - Source Voltage Continuous Drain Current(TJ=150℃) Pulsed Drain Current Continuous Source Current(Diode Conduction) Power Dissipation Operating Junction Temperature Storage Temperature Range Thermal Resistance-Junction to Ambient TA=25℃ TA=70℃ TA=25℃ TA=70℃ Symbol VDSS VGSS ID IDM IS PD TJ TSTG RθJA Typical 40 ±20 Unit V V A A A W ℃ ℃ ℃/W 10 8 30 2.3 2.5 1.6 -55/150 -55/150 80 2011/ 06/ 03 Ver.1 Page 2 N-Channel Enhancement Mode MOSFET ELECTRICAL CHARACTERISTICS (TA=25℃ Unless otherwise noted) Parameter Static Drain-Source Breakdown Voltage Gate Threshold Voltage Gate Leakage Current Zero Gate Voltage Drain Current On-State Drain Current Drain-Source On-Resistance Forward...