SPP1411 Description
The SPP1411 is the P-Channel logic enhancement mode power field effect transistors are produced using high cell density , DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application such as cellular phone and notebook puter power management and other battery powered circuits, and low in-line power loss are...
SPP1411 Key Features
- 20V/-4.0A,RDS(ON)=50mΩ@VGS=-4.5V
- 20V/-4.0A,RDS(ON)=65mΩ@VGS=-2.5V
- 20V/-2.3A,RDS(ON)=120mΩ@VGS=-1.8V
- Super high density cell design for extremely low
- Exceptional on-resistance and maximum DC
- ESD protected
- SOT-363 (SC-70-6L) package design
SPP1411 Applications
- Power Management in Note book