SPP4931W Datasheet | SYNC POWER

P-Channel Enhancement Mode MOSFET DESCRIPTION The SPP4931W is the Dual P-Channel logic enhancement mode power field effect transistors are produced using high cell density , DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application , notebook puter power management and other battery powered circuits where high-side switching . Features ‹ -20V/-8.5A,RDS(ON)= 20mΩ@VGS=-4.5V ‹ -20V/-8.0 A,RDS(ON)= 25mΩ@VGS=-2.5V ‹ -20V/-5.0 A,RDS(ON)= 35mΩ@VGS=-1.8V ‹ Super high density cell design for extremely low RDS (ON) ‹ Exceptional on-resistance and maximum DC current capability ‹ SOP-8P package design APPLICATIONS z Power Management in Note book z Portable Equipment z Battery Powered System z DC/DC Converter z Load Switch z DSC z LCD Display inverter PIN CONFIGURATION(SOP - 8P) PART MARKING 2011/10/04 Ver.2 Page 1 P-Channel Enhancement Mode MOSFET PIN DESCRIPTION Pin 1 2 3 4 5 6 7 8 ORDERING INFORMATION Part Number SPP4931WS8RGB Symbol S1 G1 S2 G2 D2 D2 D1 D1 Description Source 1 Gate 1 Source 2 Gate 2 Drain 2 Drain 2 Drain 1 Drain 1 Package SOP- 8P Part Marking ※ SPP4931WS8RGB : 13” Tape Reel ; Pb - Free ; Halogen - Free ABSOULTE MAXIMUM RATINGS (TA=25℃ Unless otherwise noted) Parameter Drain-Source Voltage Gate - Source Voltage Continuous Drain Current(TJ=150℃) Pulsed Drain Current Continuous Source Current(Diode Conduction) Power Dissipation Operating Junction Temperature Storage Temperature Range Thermal Resistance-Junction to Ambient TA=25℃ TA=70℃ TA=25℃ TA=70℃ Symbol VDSS VGSS ID IDM IS PD TJ TSTG RθJA Typical -20 ±12 -8.5 -7.0 -30 -2.3 2.8 1.8 -55/150 -55/150 70 Unit V V A A A W ℃ ℃ ℃/W 2011/10/04 Ver.2 Page 2 P-Channel Enhancement Mode MOSFET ELECTRICAL CHARACTERISTICS (TA=25℃ Unless otherwise noted) Parameter Static Drain-Source Breakdown Voltage Gate Threshold Voltage Gate Leakage Current Zero Gate...