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Gre r Pro
STD12L01
Ver 1.3
S a mHop Microelectronics C orp.
N-Channel Logic Level Enhancement Mode Field Effect Transistor
PRODUCT SUMMARY
V DSS
100V
FEATURES Super high dense cell design for low R DS(ON). Rugged and reliable. TO-251 Package.
ID
12A
R DS(ON) (m ) Max
160 @ VGS=10V
G D
S
STD SERIES TO - 251 ( I - PAK )
ABSOLUTE MAXIMUM RATINGS ( T A=25 °C unless otherwise noted ) Symbol VDS VGS ID IDM EAS PD TJ, TSTG Parameter Drain-Source Voltage Gate-Source Voltage Drain Current-Continuous -Pulsed
b d a
Limit 100 ±20 TC=25°C TC=70°C 12 9.