Datasheet Summary
S T U/D20N03L
S amHop Microelectronics C orp. J uly 23 ,2004 V er1.1
N-C hannel Logic Level E nhancement Mode Field E ffect Transistor
P R ODUC T S UMMAR Y
V DS S
.. 30V
F E AT UR E S
( mW)
28A
R DS (ON)
Max
S uper high dense cell design for low R DS (ON ).
23 @ V G S = 10V 39 @ V G S = 4.5V
R ugged and reliable. TO-252 and TO-251 P ackage.
S TU S E R IE S TO-252AA(D-P AK)
S TD S E R IE S TO-251(l-P AK)
ABS OLUTE MAXIMUM R ATINGS (T C =25 C unless otherwise noted)
P arameter Drain-S ource Voltage Gate-S ource Voltage Drain C urrent-C ontinuous -P ulsed a
S ymbol V DS V GS @ TJ=125 C ID IDM IS PD T J , T S TG
Limit 30 20 28 70 20 50 -55...