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S amHop Microelectronics C orp.
N-C hannel S Eh nhancement Mode Field E ffect Trans is tor
t e e
4U
m o .c
S T U/D1224N
Dec 20,2004
a t a P R ODUC T S UMMAR Y D . V w I R w w
DS S D
F E AT UR E S
DS (ON) ( m £[ ) Max
S uper high dense cell design for low R DS (ON ).
80 @ V G S = 4.5V
R ugged and reliable.
24V
12A
130 @ V G S = 2.5V
TO-252 and TO-251 P ackage.
D G S
G D
S
S TU S E R IE S TO-252AA(D-P AK)
S TD S E R IE S TO-251(l-P AK)
AB S OL UTE MAXIMUM R ATINGS
P arameter Drain-S ource Voltage Gate-S ource Voltage
Drain C urrent-C ontinuous a @ T J =25 C b -P ulsed Drain-S ource Diode Forward C urrent a Maximum P ower Dissipation a Operating Junction and S torage Temperature R ange
w
w
w
.