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KM23SV64205T - 2M x 32 Synchronous Mask ROM

Description

The KM23SV64205T is a synchronous high bandwidth mask programmable ROM fabricated with SAMSUNG′s high performance CMOS process technology and is organized either as 4,194,304 x16bit(word mode) or as 2,097,152 x32bit(double word mode) depending on polarity of WORD pin.(see pin function description).

Features

  • JEDEC standard 3.3V power supply.
  • LVTTL compatible with multiplexed address.
  • Address: Row address: RA0 ~ RA12 Column address: CA0 ~ CA7 (x32): CA0 ~ CA8 (x16).
  • Switchable organization 4,194,304 x 16(word mode) / 2,097,152 x 32(double word mode).
  • All inputs are sampled at the rising edge of the system clock.
  • Read Performance at memory point of view @33MHz 4-1-1-1 (RAS Latency=1, CAS Latency=3) @50MHz 5-1-1-1 (RAS Latency=1, CAS Latency=4) @66.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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KM23SV64205T 2Mx32 Synchronous MASKROM FEATURES • JEDEC standard 3.3V power supply • LVTTL compatible with multiplexed address • Address: Row address: RA0 ~ RA12 Column address: CA0 ~ CA7 (x32): CA0 ~ CA8 (x16) • Switchable organization 4,194,304 x 16(word mode) / 2,097,152 x 32(double word mode) • All inputs are sampled at the rising edge of the system clock • Read Performance at memory point of view @33MHz 4-1-1-1 (RAS Latency=1, CAS Latency=3) @50MHz 5-1-1-1 (RAS Latency=1, CAS Latency=4) @66MHz 5-1-1-1 (RAS Latency=1, CAS Latency=4) @83MHz 7-1-1-1 (RAS Latency=2, CAS Latency=5) @100MHz 7-1-1-1 (RAS Latency=2, CAS Latency=5) • tSAC : 6ns • MRS cycle with address key programs -. RAS Latency(1 & 2) -. CAS Latency(3 ~ 6) -. Burst Length : 4, 8 -.
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