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K4H561638F-TCC4 - 256Mb F-die DDR400 SDRAM Specification

This page provides the datasheet information for the K4H561638F-TCC4, a member of the K4H560838F-TC 256Mb F-die DDR400 SDRAM Specification family.

Datasheet Summary

Description

DDR SDRAM 16Mb x 16 32Mb x 8 VDD DQ0 VDDQ DQ1 DQ2 VSSQ DQ3 DQ4 VDDQ DQ5 DQ6 VSSQ DQ7 NC VDDQ LDQS NC VDD NC LDM WE CAS RAS CS NC BA0 BA1 AP/A10 A0 A1 A2 A3 VDD VDD DQ0 VDDQ NC DQ1 VSSQ NC DQ2 VDDQ NC DQ3 VSSQ NC NC VDDQ NC NC VDD NC NC WE CAS RAS CS NC BA0 BA1 AP/A10 A0 A1 A2 A3 VDD 1 2 3 4 5 6 7

Features

  • 200MHz Clock, 400Mbps data rate.
  • VDD= +2.6V + 0.10V, VDDQ= +2.6V + 0.10V.
  • Double-data-rate architecture; two data transfers per clock cycle.
  • Bidirectional data strobe(DQS).
  • Four banks operation.
  • Differential clock inputs(CK and CK).
  • DLL aligns DQ and DQS transition with CK transition.
  • MRS cycle with address key programs -. Read latency 3 (clock) for DDR400 , 2.5 (clock) for DDR333 -. Burst length (2, 4, 8) -. Burst type (s.

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Datasheet preview – K4H561638F-TCC4

Datasheet Details

Part number K4H561638F-TCC4
Manufacturer Samsung semiconductor
File Size 171.18 KB
Description 256Mb F-die DDR400 SDRAM Specification
Datasheet download datasheet K4H561638F-TCC4 Datasheet
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DDR SDRAM 256Mb F-die (x8, x16) DDR SDRAM 256Mb F-die DDR400 SDRAM Specification Revision 1.1 Rev. 1.1 August. 2003 DDR SDRAM 256Mb F-die (x8, x16) 256Mb F-die Revision History Revison 1.0 (June. 2003) 1. First release Revison 1.1 (August. 2003) 1. Added x8 org (K4H560838F) DDR SDRAM Rev. 1.1 August. 2003 DDR SDRAM 256Mb F-die (x8, x16) Key Features • 200MHz Clock, 400Mbps data rate. • VDD= +2.6V + 0.10V, VDDQ= +2.6V + 0.10V • Double-data-rate architecture; two data transfers per clock cycle • Bidirectional data strobe(DQS) • Four banks operation • Differential clock inputs(CK and CK) • DLL aligns DQ and DQS transition with CK transition • MRS cycle with address key programs -. Read latency 3 (clock) for DDR400 , 2.5 (clock) for DDR333 -. Burst length (2, 4, 8) -.
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