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K4M51323LC-SDN - Mobile-SDRAM

This page provides the datasheet information for the K4M51323LC-SDN, a member of the K4M51323LC-SN Mobile-SDRAM family.

Datasheet Summary

Description

The K4M51323LC is 536,870,912 bits synchronous high data rate Dynamic RAM organized as 4 x 4,196,304 words by 32 bits, fabricated with SAMSUNG’s high performance CMOS technology.

Features

  • VDD/VDDQ = 2.5V/2.5V.
  • LVCMOS compatible with multiplexed address.
  • Four banks operation.
  • MRS cycle with address key programs. -. CAS latency (1, 2 & 3). -. Burst length (1, 2, 4, 8 & Full page). -. Burst type (Sequential & Interleave).
  • EMRS cycle with address key programs.
  • All inputs are sampled at the positive going edge of the system clock.
  • Burst read single-bit write operation.
  • Special Function Support. -. PASR (Par.

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Datasheet preview – K4M51323LC-SDN

Datasheet Details

Part number K4M51323LC-SDN
Manufacturer Samsung semiconductor
File Size 181.67 KB
Description Mobile-SDRAM
Datasheet download datasheet K4M51323LC-SDN Datasheet
Additional preview pages of the K4M51323LC-SDN datasheet.

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Full PDF Text Transcription

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K4M51323LC - S(D)N/G/L/F 4M x 32Bit x 4 Banks Mobile SDRAM in 90FBGA FEATURES • VDD/VDDQ = 2.5V/2.5V • LVCMOS compatible with multiplexed address. • Four banks operation. • MRS cycle with address key programs. -. CAS latency (1, 2 & 3). -. Burst length (1, 2, 4, 8 & Full page). -. Burst type (Sequential & Interleave). • EMRS cycle with address key programs. • All inputs are sampled at the positive going edge of the system clock. • Burst read single-bit write operation. • Special Function Support. -. PASR (Partial Array Self Refresh). -. Internal TCSR (Temperature Compensated Self Refresh) • DQM for masking. • Auto refresh. • • • • 64ms refresh period (8K cycle). Commercial Temperature Operation (-25°C ~ 70°C). Extended Temperature Operation (-25°C ~ 85°C).
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