• Part: K4R881869M-NCK8
  • Description: 288Mbit RDRAM 512K x 18 bit x 2*16 Dependent Banks Direct RDRAMTM
  • Manufacturer: Samsung Semiconductor
  • Size: 3.99 MB
Download K4R881869M-NCK8 Datasheet PDF
Samsung Semiconductor
K4R881869M-NCK8
K4R881869M-NCK8 is 288Mbit RDRAM 512K x 18 bit x 2*16 Dependent Banks Direct RDRAMTM manufactured by Samsung Semiconductor.
- Part of the K4R comparator family.
Overview The Rambus Direct RDRAM™ is a general purpose highperformance memory device suitable for use in a broad range of applications including puter memory, graphics, video, and any other application where high bandwidth and low latency are required. The 288Mbit Direct Rambus DRAMs (RDRAM®) are extremely high-speed CMOS DRAMs organized as 16M words by 18 bits. The use of Rambus Signaling Level (RSL) technology permits 600MHz to 800MHz transfer rates while using conventional system and board design technologies. Direct RDRAM devices are capable of sustained data transfers at 1.25 ns per two bytes (10ns per sixteen bytes). The architecture of the Direct RDRAMs allows the highest sustained bandwidth for multiple, simultaneous randomly addressed memory transactions. The separate control and data buses with independent row and column control yield over 95% bus efficiency. The Direct RDRAM's 32 banks support up to four simultaneous transactions. System oriented features for mobile, graphics and large memory systems include power management, byte masking, and x18 organization. The two data bits in the x18 organization are general and can be used for additional storage/bandwidth or for error correction. Preliminary Direct RDRAM™ SAMSUNG 001 K4R88 xx 69A-N xxx Figure 1: Direct RDRAM CSP Package Key Timing Parameters/Part Numbers Speed Organization Bin 512Kx18x32sa -CG6 -CK7 -CK8 I/O Freq. MHz 600 711 800 t RAC (Row Access Time) ns 53.3 45 45 Part Number K4R881869M-Nb Cc G6 K4R881869M-NCK7 K4R881869M-NCK8 Features - Highest sustained bandwidth per DRAM device - 1.6GB/s sustained data transfer rate - Separate control/data buses for maximum efficiency - Separate row and column control buses for easy scheduling and highest performance - 32 banks: four transactions can take place simultaneously at full bandwidth data rates - Low latency features - Write buffer to reduce read latency - 3 precharge mechanisms for controller flexibility - Interleaved transactions - Advanced...