K4R881869M-NbCcG6 Overview
K4R881869M Preliminary Direct RDRAM™ 288Mbit RDRAM 512K x 18 bit x 2 16 Dependent Banks Direct RDRAMTM Revision 0.9 January 2000 Page -1 Rev. 2000 K4R881869M Revision History Version 0.9 (January 2000) - Preliminary - First Copy - Based on the Rambus Datasheet 0.9ver. Preliminary Direct RDRAM™ Page 0 Rev.
K4R881869M-NbCcG6 Key Features
- Highest sustained bandwidth per DRAM device
- 1.6GB/s sustained data transfer rate
- Separate control/data buses for maximum efficiency
- Separate row and column control buses for easy scheduling and highest performance
- 32 banks: four transactions can take place simultaneously at full bandwidth data rates -Low latency features
- Write buffer to reduce read latency
- 3 precharge mechanisms for controller flexibility
- Interleaved transactions -Advanced power management
- Multiple low power states allows flexibility in power consumption versus time to active state
- Power-down self-refresh -Organization: 2Kbyte pages and 32 banks, x 18