Datasheet Summary
CMOS SDRAM
128Mbit SDRAM
4M x 8Bit x 4 Banks Synchronous DRAM LVTTL
Revision 0.0 Mar. 2000
- Samsung Electronics reserves the right to change products or specification without notice.
Rev. 0.0 Mar. 2000
Revision History
Revision 0.0 (March 21, 2000)
- Changed tOH of K4S280432C-TC75/TL75 from 2.7ns to 3.0ns.
- Deleted -10 and -80 speed specification.
CMOS SDRAM
Rev. 0.0 Mar. 2000
4M x 8Bit x 4 Banks Synchronous DRAM
Features
- JEDEC standard 3.3V power supply
- LVTTL patible with multiplexed address
- Four banks operation
- MRS cycle with address key programs -. CAS latency (2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -. Burst type...
