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K4S513233F-MEL Key Features

  • 3.0V & 3.3V power supply
  • LVCMOS patible with multiplexed address
  • Four banks operation
  • MRS cycle with address key programs. -. CAS latency (1, 2 & 3). -. Burst length (1, 2, 4, 8 & Full page). -. Burst type
  • EMRS cycle with address key programs
  • All inputs are sampled at the positive going edge of the system clock
  • Burst read single-bit write operation
  • Special Function Support. -. PASR (Partial Array Self Refresh). -. Internal TCSR (Temperature pensated Self Refresh)
  • DQM for masking
  • Auto refresh

K4S513233F-MEL Description

The K4S513233F is 536,870,912 bits synchronous high data rate Dynamic RAM organized as 4 x 4,196,304 words by 32 bits, fabricated with SAMSUNG’s high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock and I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst lengths and programmable latencies allow the same device...