K4S51323PF-MF Overview
The K4S51323PF is 536,870,912 bits synchronous high data rate Dynamic RAM organized as 4 x 4,196,304 words by 32 bits, fabricated with SAMSUNG’s high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock and I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst lengths and programmable latencies allow the same device...
K4S51323PF-MF Key Features
- EMRS cycle with address key programs
- All inputs are sampled at the positive going edge of the system clock
- Burst read single-bit write operation
- Special Function Support. -. PASR (Partial Array Self Refresh). -. Internal TCSR (Temperature pensated Self Refresh) -.
- DQM for masking
- Auto refresh
- 64ms refresh period (8K cycle)
- mercial Temperature Operation (-25°C ~ 70°C)
- 2Chips DDP 90Balls FBGA( -MXXX -Pb, -EXXX -Pb Free)