K4S56323LF-FHC Datasheet PDF (2M x 32Bit x 4 Banks Mobile SDRAM) | Download Samsung semiconductor K4S56323LF-FHC

K4S56323LF-FHC - 2M x 32Bit x 4 Banks Mobile SDRAM

Download the K4S56323LF-FHC datasheet PDF (K4S56323LF-FE included). The manufacturer datasheet provides complete specifications, pinout details, electrical characteristics, and typical applications for 2m x 32bit x 4 banks mobile sdram.

Description

The K4S56323LF is 268,435,456 bits synchronous high data rate Dynamic RAM organized as 4 x 2,097,152 words by 32 bits, fabricated with SAMSUNG’s high performance CMOS technology.

Features

VDD/VDDQ = 2.5V/2.5V.
LVCMOS compatible with multiplexed address.
Four banks operation.
MRS cycle with address key programs. -. CAS latency (1, 2 & 3). -. Burst length (1, 2, 4, 8 & Full page). -. Burst type (Sequential & Interleave).
EMRS cycle with address key programs.
All inputs are sampled at the positive going edge of the system clock.
Burst read single-bit write operation.
Special Function Support. -. PASR (Par.

Datasheet Details

Part number	K4S56323LF-FHC
Manufacturer	Samsung Semiconductor
File Size	170.16 KB
Description	2M x 32Bit x 4 Banks Mobile SDRAM
Datasheet	K4S56323LF-FHC Datasheet

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Full PDF Text Transcription

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K4S56323LF - F(H)E/N/S/C/L/R 2M x 32Bit x 4 Banks Mobile SDRAM in 90FBGA FEATURES • VDD/VDDQ = 2.5V/2.5V • LVCMOS compatible with multiplexed address. • Four banks operation. • MRS cycle with address key programs. -. CAS latency (1, 2 & 3). -. Burst length (1, 2, 4, 8 & Full page). -. Burst type (Sequential & Interleave). • EMRS cycle with address key programs. • All inputs are sampled at the positive going edge of the system clock. • Burst read single-bit write operation. • Special Function Support. -. PASR (Partial Array Self Refresh). -. Internal TCSR (Temperature Compensated Self Refresh) • DQM for masking. • Auto refresh. • • • • 64ms refresh period (4K cycle). Commercial Temperature Operation (-25°C ~ 70°C). Extended Temperature Operation (-25°C ~ 85°C).

Published: Apr 4, 2010 |