Datasheet Summary
CMOS SDRAM
64Mbit SDRAM
1M x 16Bit x 4 Banks Synchronous DRAM LVTTL
Revision 0.3 June 2000
- Samsung Electronics reserves the right to change products or specification without notice.
Rev. 0.3 June 2000
Revision History
Revision 0.1 (May 2000)
- Changed tOH of K4S280432C-TC75/TL75 from 2.7ns to 3.0ns.
CMOS SDRAM
Revision 0.2 (May 2000)
- Added -70 (7.0ns) Speed.
Revision 0.3 (June 2000)
- Added -60 (6.0ns) and -55(5.5ns) Speed.
Rev. 0.3 June 2000
1M x 16Bit x 4 Banks Synchronous DRAM
Features
- -
- - JEDEC standard 3.3V power supply LVTTL patible with multiplexed address Four banks operation MRS cycle with address key programs -. CAS latency...
