K6E0808C1C-15 - 32Kx8 Bit High Speed CMOS Static RAM

Description

The K6E0808C1C is a 262,144-bit high-speed Static Random Access Memory organized as 32,768 words by 8 bits.

The K6E0808C1C uses 8 common input and output lines and has an output enable pin which operates faster than address access time at read cycle.

Features

Fast Access Time 12, 15, 20ns(Max. ).
Low Power Dissipation Standby (TTL) : 40mA(Max. ) (CMOS) : 2mA(Max. ) Operating K6E0808C1C-12 : 165mA(Max. ) K6E0808C1C-15 : 150mA(Max. ) K6E0808C1C-20 : 140mA(Max. ).
Single 5.0V±10% Power Supply.
TTL Compatible Inputs and Outputs.
I/O Compatible with 3.3V Device.
Fully Static Operation - No Clock or Refresh required.
Three State Outputs.
Standard Pin Configuration K6E0808C1C-J : 28-SOJ-300.

Samsung semiconductor

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Datasheet Details

Part number	K6E0808C1C-15
Manufacturer	Samsung semiconductor
File Size	168.09 KB
Description	32Kx8 Bit High Speed CMOS Static RAM
Datasheet	K6E0808C1C-15 Datasheet
Additional preview pages of the K6E0808C1C-15 datasheet.

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Full PDF Text Transcription

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PRELIMINARY K6E0808C1C-C Document Title 32Kx8 Bit High Speed Static RAM(5V Operating), Evolutionary Pin out. CMOS SRAM Revision History Rev No. Rev. 0.0 Rev. 1.0 History Initial release with Preliminary. Release to final Data Sheet. 1. Delete Preliminary Update A.C parameters 2.1. Updated A.C parameters Previous spec. Updated spec. (12/15/20ns part) (12/15/20ns part) tOE - / 8/10ns - / 7 /9 ns tCW - /12/ - ns - /11/ - ns tHZ 8/10/10ns 6/ 7/10ns tOHZ - / 8 / - ns - / 7 / - ns tDW - / 9 / - ns - / 8 / - ns 2.2. Add VOH1=3.95V with the test condition as Vcc=5V±5% at 25°C Items Rev. 3.0 3.1. Add 28-TSOP1 Package. 3.2. Add L-version. 3.3. Add Data Rentention Characteristics. 4.1. Delete DIP Package. 4.2. Delete L-version. 4.3. Delete Data Retention Characteristics and Waveform. Feb.

Published: Apr 7, 2005 |