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K7D321874C - 1Mx36 & 2Mx18 SRAM

This page provides the datasheet information for the K7D321874C, a member of the K7D323674C 1Mx36 & 2Mx18 SRAM family.

Datasheet Summary

Description

The K7D323674C and K7D321874C are 37,748,736 bit Synchronous Pipeline Burst Mode SRAM devices.

They are organized as 1,048,576 words by 36 bits for K7D323674C and 2,097,152 words by 18 bits for K7D321874C, fabricated using Samsung's advanced CMOS technology.

Features

  • 1Mx36 or 2Mx18 Organizations. 1.8~2.5V VDD/1.5V ~1.8VDDQ. HSTL Input and Outputs. Single Differential HSTL Clock. Synchronous Pipeline Mode of Operation with Self-Timed Late Write.
  • Free Running Active High and Active Low Echo Clock Output Pin.
  • Registered Addresses, Burst Control and Data Inputs. 1Mx36 & 2Mx18 SRAM.
  • Registered Outputs.
  • Double and Single Data Rate Burst Read and Write.
  • Burst Count.

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Datasheet preview – K7D321874C

Datasheet Details

Part number K7D321874C
Manufacturer Samsung semiconductor
File Size 494.78 KB
Description 1Mx36 & 2Mx18 SRAM
Datasheet download datasheet K7D321874C Datasheet
Additional preview pages of the K7D321874C datasheet.

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K7D323674C K7D321874C 1Mx36 & 2Mx18 SRAM 36Mb DDR SRAM Specification 153BGA with Pb & Pb-Free (RoHS compliant) INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOLOGY. ALL INFORMATION IN THIS DOCUMENT IS PROVIDED ON AS "AS IS" BASIS WITHOUT GUARANTEE OR WARRANTY OF ANY KIND. 1. For updates or additional information about Samsung products, contact your nearest Samsung office. 2.
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