K7M163625M Overview
The K7M163625M and K7M161825M are 18,874,368-bits Synchronous Static SRAMs. The N tRAM TM , or No Turnaround Random Access Memory utilizes all bandwidth in any bination of operating cycles. Address, data inputs, and all control signals except output enable and linear burst order are synchronized to input clock.
K7M163625M Key Features
- 3.3V+0.165V/-0.165V Power Supply
- Byte Writable Function
- Enable clock and suspend operation
- Single READ/WRITE control pin
- Self-Timed Write Cycle
- Three Chip Enable for simple depth expansion with no data contention
- A interleaved burst or a linear burst mode
- Asynchronous output enable control
- Power Down mode
- TTL-Level Three-State Outputs