K7N403601A Overview
The K7N403601A and K7N401801A are 4,718,592 bits Synchronous Static SRAMs. The NtRAMTM, or No Turnaround Random Access Memory utilizes all the bandwidth in any bination of operating cycles. Address, data inputs, and all control signals except output enable and linear burst order are synchronized to input clock.
K7N403601A Key Features
- VDD=3.3V+0.165V/-0.165V Power Supply
- Byte Writable Function
- Enable clock and suspend operation
- Single READ/WRITE control pin
- Self-Timed Write Cycle
- Three Chip Enable for simple depth expansion with no datacontention
- Α interleaved burst or a linear burst mode
- Asynchronous output enable control
- Power Down mode
- TTL-Level Three-State Outputs