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K9F5608U0M-YCB0 - 32M x 8 Bit NAND Flash Memory

General Description

- SE is recommended to coupled to GND or Vcc and should not be toggled during reading or programming.

April.

10th 1999 July.

Key Features

  • Voltage Supply : 2.7V~3.6V.
  • Organization - Memory Cell Array : (32M + 1024K)bit x 8bit - Data Register : (512 + 16)bit x8bit.
  • Automatic Program and Erase - Page Program : (512 + 16)Byte - Block Erase : (16K + 512)Byte.
  • 528-Byte Page Read Operation - Random Access : 10µ s(Max. ) - Serial Page Access : 50ns(Min. ).
  • Fast Write Cycle Time - Program time : 200µ s(Typ. ) - Block Erase Time : 2ms(Typ. ).
  • Command/Address/Data Multiplexed I/O Port.

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Full PDF Text Transcription for K9F5608U0M-YCB0 (Reference)

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K9F5608U0M-YCB0,K9F5608U0M-YIB0 Document Title 32M x 8 Bit NAND Flash Memory FLASH MEMORY Revision History Revision No. History 0.0 0.1 0.2 Initial issue. Revised real-ti...

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istory Revision No. History 0.0 0.1 0.2 Initial issue. Revised real-time map-out algorithm(refer to technical notes) 1. Changed device name i. KM29U256T -> K9F5608U0M-YCB0 ii. KM29U256IT -> K9F5608U0M-YIB0 1. Changed tWP AC Timing - If tCS is set less than 10ns, tWP must be minimum 35ns, otherwise tWP may be minimum 25ns. 2. Changed Sequential Row Read operation - The Sequential Read 1 and 2 operation is allowed only within a block 3. Changed invalid block(s) marking method prior to shipping - The invalid block(s) information is written the 1st or 2nd page of the invalid block(s) with 00h data --->The invalid block(s) stat

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