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KM44S32030B Datasheet 128mbit Sdram 8m X 4bit X 4 Banks Synchronous Dram Lvttl

Manufacturer: Samsung Semiconductor

Overview: KM44S32030B CMOS SDRAM 128Mbit SDRAM 8M x 4Bit x 4 Banks Synchronous DRAM LVTTL Revision 0.1 June 1999 * Samsung Electronics reserves the right to change products or specification without notice. Rev. 0.1 Jun. 1999 KM44S32030B Revision History Revision 0.0 (May 15, 1999) CMOS SDRAM • Changed tRDL from 1CLK to 2CLK in OPERATING AC PARAMETER. • Skip ICC4 value of CL=2 in DC characteristics in datasheet. • Define a new parameter of tDAL( 2CLK +20ns), Last data in to Active delay in OPERATING AC PARAMETER. • Eliminated FREQUENCY vs.PARAMETER RELATIONSHIP TABLE. • Symbol Change Notice IIL IIL IOL Before Input leakage current (inputs) Input leakage current (I/O pins) Output open @ DC characteristic table ILI Io After Input leakage current Output open @ DC characteristic table • Test Condition in DC CHARACTERISTIC Change Notice Symbol ICC2P , ICC3P ICC2N , ICC3N ICC4 Before CKE ≤ VIL(max), tCC = 15ns CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 15ns Input signals are changed one time during 30ns 2 Banks activated After CKE ≤ VIL(max), tCC = 10ns CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns Input signals are changed one time during 20ns 4 Banks activated Revision 0.1 (Jun 28, 1999) • Added Notes @OPERATING AC PARAMETER Notes : 5. For -8/H/L, tRDL=1CLK and tDAL=1CLK+20ns is also supported . SAMSUNG recommands tRDL=2CLK and tDAL=2CLK + 20ns. • Added -10 bining product. Rev. 0.1 Jun.

General Description

The KM44S32030B is 134,217,728 bits synchronous high data rate Dynamic RAM organiz

Key Features

  • JEDEC standard 3.3V power supply.
  • LVTTL compatible with multiplexed address.
  • Four banks operation.
  • MRS cycle with address key programs -. CAS latency (2 & 3) -. Burst length (1, 2, 4, 8 Page ) -. Burst type (Sequential & Interleave).
  • All inputs are sampled at the positive going edge of the system clock.
  • Burst read single-bit write operation.
  • DQM for masking.
  • Auto & self refresh.
  • 64ms refresh period (4K Cycle) CMO.

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